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19-3430; Rev 0; 10/04
KIT ATION EVALU ILABLE AVA
Triple-Output TFT-LCD DC-DC Converters
General Description Features
Three Integrated DC-DC Converters 1MHz Current-Mode PWM Boost Regulator Up to +13V Main High-Power Output 1% Accuracy High Efficiency (93%) Dual Charge-Pump Outputs Up to +40V Positive Charge-Pump Output Down to -40V Negative Charge-Pump Output Internal Supply Sequencing Internal Power MOSFETs +2.7V to +5.5V Input Supply 0.1A Shutdown Current 0.6mA Quiescent Current Internal Soft-Start Power-Ready Output Ultra-Small External Components Thin TSSOP Package (1.1mm max)
MAX1748/MAX8726
The MAX1748/MAX8726 triple-output DC-DC converters in a low-profile TSSOP package provide the regulated voltages required by active-matrix, thin-film transistor (TFT) liquid-crystal displays (LCDs). One high-power DC-DC converter and two low-power charge pumps convert the +3.3V to +5V input supply voltage into three independent output voltages. The primary 1MHz DC-DC converter generates a boosted output voltage (VMAIN) up to 13V using ultra-small inductors and ceramic capacitors. The low-power BiCMOS control circuitry and the low on-resistance (0.35) of the integrated power MOSFET allows efficiency up to 93%. The dual charge pumps independently regulate one positive output (VPOS) and one negative output (VNEG). These low-power outputs use external diode and capacitor stages (as many stages as required) to regulate output voltages up to +40V and down to -40V. A proprietary regulation algorithm minimizes output ripple, as well as capacitor sizes for both charge pumps. For both the MAX1748 and MAX8726, the supply sequence is VMAIN first, VNEG next, and finally VPOS. The MAX1748 soft-starts each supply as soon as the previous supply finishes. The MAX8726 adds a delay between the startups of V MAIN and V NEG and also between VNEG and VPOS. The MAX1748/MAX8726 are available in the ultra-thin TSSOP package (1.1mm max height).
Ordering Information
PART MAX1748EUE MAX8726EUE TEMP RANGE -40C to +85C -40C to +85C PIN-PACKAGE 16 TSSOP 16 TSSOP
Applications
TFT Active-Matrix LCD Displays Passive-Matrix LCD Displays PDAs Digital Still Cameras Camcorders
TOP VIEW
RDY 1 FB 2 INTG 3 IN 4 GND 5 REF 6 FBP 7 FBN 8
Pin Configuration
16 TGND 15 LX 14 PGND
MAX1748 MAX8726
13 SUPP 12 DRVP 11 SUPN 10 DRVN 9 SHDN
TSSOP Typical Operating Circuit appears at end of data sheet.
________________________________________________________________ Maxim Integrated Products
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
ABSOLUTE MAXIMUM RATINGS
IN, SHDN, TGND to GND .........................................-0.3V to +6V DRVN to GND .........................................-0.3V to (VSUPN + 0.3V) DRVP to GND..........................................-0.3V to (VSUPP + 0.3V) PGND to GND.....................................................................0.3V RDY to GND ...........................................................-0.3V to +14V LX, SUPP, SUPN to PGND .....................................-0.3V to +14V INTG, REF, FB, FBN, FBP to GND ...............-0.3V to (VIN + 0.3V) Continuous Power Dissipation (TA = +70C) 16-Pin TSSOP (derate 9.4mW/C above +70C) ..........755mW Operating Temperature Range MAX1748EUE/MAX8726EUE..........................-40C to +85C Junction Temperature ......................................................+150C Storage Temperature Range .............................-65C to +150C Lead Temperature (soldering, 10s) .................................+300C
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VIN = +3.0V, SHDN = IN, VSUPP = VSUPN = 10V, TGND = PGND = GND, CREF = 0.22F, CINTG = 470pF, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Input Supply Range Input Undervoltage Threshold IN Quiescent Supply Current SUPP Quiescent Current SUPN Quiescent Current IN Shutdown Current SUPP Shutdown Current SUPN Shutdown Current MAIN BOOST CONVERTER Output Voltage Range FB Regulation Voltage FB Input Bias Current Operating Frequency Oscillator Maximum Duty Cycle Load Regulation Line Regulation Integrator Gm LX Switch On-Resistance LX Leakage Current RLX(ON) ILX ILX = 100mA VLX = 13V Phase I = soft-start (1.0ms) LX Current Limit ILX(MAX) Phase II = soft-start (1.0ms) Phase III = soft-start (1.0ms) Phase IV = fully on (after 3.0ms) Maximum RMS LX Current Soft-Start Period FB Fault Trip Level POSITIVE CHARGE PUMP VSUPP Input Supply Range VSUPP tSS Power-up to the end of phase III 1.07 2.7 1.1 0.275 IMAIN = 0 to 200mA, VMAIN = 10V VMAIN VFB IFB fOSC TA = 0C to +85C VFB = 1.25V, INTG = GND VIN 1.235 -50 0.85 78 1 85 0.2 0.1 320 0.35 0.01 0.380 0.75 1.12 1.5 1 3072 / fOSC 1.1 1.14 13.0 2.0 A s V V 0.7 20 0.500 A 1.248 13 1.261 +50 1.15 90 V V nA MHz % % %/V mho A SYMBOL VIN VUVLO IIN ISUPP ISUPN VIN rising, 40mV hysteresis (typ) VFB = VFBP = 1.5V, VFBN = -0.2V VFBP = 1.5V VFBN = -0.1V V SHDN = 0, VIN = 5V V SHDN = 0, VSUPP = 13V V SHDN = 0, VSUPN = 13V CONDITIONS MIN 2.7 2.2 2.4 0.6 0.4 0.4 0.1 0.1 0.1 TYP MAX 5.5 2.6 1 0.8 0.8 10 10 10 UNITS V V mA mA mA A A A
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Triple-Output TFT-LCD DC-DC Converters
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +3.0V, SHDN = IN, VSUPP = VSUPN = 10V, TGND = PGND = GND, CREF = 0.22F, CINTG = 470pF, TA = 0C to +85C, unless otherwise noted. Typical values are at TA = +25C.)
PARAMETER Operating Frequency FBP Regulation Voltage FBP Input Bias Current DRVP PCH On-Resistance DRVP NCH On-Resistance FBP Power-Ready Trip Level FBP Fault Trip Level Maximum RMS DRVP Current NEGATIVE CHARGE PUMP VSUPN Input Supply Range Operating Frequency FBN Regulation Voltage FBN Input Bias Current DRVN PCH On-Resistance DRVN NCH On-Resistance FBN Power-Ready Trip Level FBN Fault Trip Level Maximum RMS DRVN Current REFERENCE Reference Voltage Reference Undervoltage Threshold LOGIC SIGNALS SHDN Input Low Voltage SHDN Input High Voltage SHDN Input Current RDY Output Low Voltage RDY Output High Voltage I SHDN ISINK = 2mA V RDY = 13V VREF -2A < IREF < +50A VREF rising 1.231 0.9 1.25 1.05 1.269 1.2 V V VFBN = 0.035V VFBN = -0.025V Rising edge Falling edge 20 80 110 130 0.1 165 VFBN IFBN -50 -50 VSUPN 2.7 0.5 x fOSC 0 3 1.5 VFBN = -0.05V +50 +50 10 4 13.0 V Hz mV nA k mV mV A VFBP IFBP 1.20 -50 SYMBOL CONDITIONS MIN TYP 0.5 x fOSC 1.25 3 VFBP = 1.213V VFBP = 1.275V Rising edge Falling edge 20 1.091 1.125 1.11 0.1 1.159 1.5 VFBP = 1.5V 1.30 +50 10 4 MAX UNITS Hz V nA k V V A
MAX1748/MAX8726
0.4V hysteresis (typ) 2.1 0.01 0.25 0.01
0.9 1 0.5 1
V V A V A
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
ELECTRICAL CHARACTERISTICS
(VIN = +3.0V, SHDN = IN, VSUPP = VSUPN = 10V, TGND = PGND = GND, CREF = 0.22F, CINTG = 470pF, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER Input Supply Range Input Undervoltage Threshold IN Quiescent Supply Current SUPP Quiescent Current SUPN Quiescent Current IN Shutdown Current SUPP Shutdown Current SUPN Shutdown Current MAIN BOOST CONVERTER Output Voltage Range FB Regulation Voltage FB Input Bias Current Operating Frequency Oscillator Maximum Duty Cycle LX Switch On-Resistance LX Leakage Current LX Current Limit FB Fault Trip Level POSITIVE CHARGE PUMP SUPP Input Supply Range FBP Regulation Voltage FBP Input Bias Current DRVP PCH On-Resistance DRVP NCH On-Resistance FBP Power-Ready Trip Level NEGATIVE CHARGE PUMP SUPN Input Supply Range FBN Regulation Voltage FBN Input Bias Current DRVN PCH On-Resistance DRVN NCH On-Resistance FBN Power-Ready Trip Level REFERENCE Reference Voltage Reference Undervoltage VREF -2A < IREF < +50A VREF rising 1.223 0.9 1.269 1.2 V V VFBN = 0.035V VFBN = -0.025V Rising edge 20 80 165 VSUPN VFBN IFBN VFBN = -0.05V 2.7 -50 -50 13.0 +50 +50 10 4 V mV nA k mV VFBP = 1.213V VFBP = 1.275V Rising edge 20 1.091 1.159 VSUPP VFBP IFBP VFBP = 1.5V 2.7 1.20 -50 13.0 1.30 +50 10 4 V V nA k V RLX(ON) ILX ILX(MAX) ILX = 100mA VLX = 13V Phase I = soft-start (1.0ms) Phase IV = fully on (after 3.0ms) 0.275 1.1 1.07 VMAIN VFB IFB FOSC VFB = 1.25V, INTG = GND VIN 1.222 -50 0.75 78 13.0 1.271 +50 1.25 90 0.7 20 0.500 2.0 1.14 V V nA MHz % A A V SYMBOL VIN VUVLO IIN ISUPP ISUPN VIN rising, 40mV hysteresis (typ) VFB = VFBP = 1.5V, VFBN = -0.2V VFBP = 1.5V VFBN = -0.1V V SHDN = 0, VIN = 5V V SHDN = 0, VSUPP = 13V V SHDN = 0, VSUPN = 13V CONDITIONS MIN 2.7 2.2 MAX 5.5 2.6 1 0.8 0.8 10 10 10 UNITS V V mA mA mA A A A
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Triple-Output TFT-LCD DC-DC Converters
ELECTRICAL CHARACTERISTICS (continued)
(VIN = +3.0V, SHDN = IN, VSUPP = VSUPN = 10V, TGND = PGND = GND, CREF = 0.22F, CINTG = 470pF, TA = -40C to +85C, unless otherwise noted.) (Note 1)
PARAMETER LOGIC SIGNALS SHDN Input Low Voltage SHDN Input High Voltage SHDN Input Current RDY Output Low Voltage RDY Output High Leakage I SHDN ISINK = 2mA V RDY = 13V 0.45V hysteresis (typ) 2.1 1 0.5 1 0.9 V V A V A SYMBOL CONDITIONS MIN MAX UNITS
MAX1748/MAX8726
Note 1: Specifications from 0C to -40C are guaranteed by design, not production tested.
Typical Operating Characteristics
(Circuit of Figure 5, VIN = 3.3V, TA = +25C, unless otherwise noted.)
MAIN OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1748/8726 toc01
MAIN STEP-UP CONVERTER EFFICIENCY vs. LOAD CURRENT (BOOST ONLY)
MAX1748/8726 toc02
MAIN STEP-UP CONVERTER EFFICIENCY vs. LOAD CURRENT (BOOST ONLY)
VMAIN = 8V VIN = 5.0V 95 90 EFFICIENCY (%) 85 VIN = 3.3V 80 75 70 65 60 0 100 200 300 400 500 600 700 800 IMAIN (mA)
MAX1748/8726 toc03
10.04 10.02 10.00 9.98 VMAIN (V) 9.96 9.94 9.92 9.90 9.88 9.86 9.84 0 100 200 300 IMAIN (mA) 400 500 VIN = 3.3V VIN = 5.0V
100 95 90 EFFICIENCY (%) 85
100
VMAIN = 10V VIN = 5.0V
VIN = 3.3V 80 75 70 65 60
600
0
100
200
300 IMAIN (mA)
400
500
600
EFFICIENCY vs. LOAD CURRENT (BOOST CONVERTER AND CHARGE PUMPS)
MAX1748/8726 toc04
NEGATIVE CHARGE-PUMP OUTPUT VOLTAGE vs. LOAD CURRENT
MAX1748/8726 toc05
NEGATIVE CHARGE-PUMP EFFICIENCY vs. LOAD CURRENT
VSUPN = 6V 70 EFFICIENCY (%) 60 50 40 30 20 VNEG = -5V 0 5 10 15 20 INEG (mA) 25 30 35 40 VSUPN = 8V
MAX1748/8726 toc06
90 85 80 EFFICIENCY (%) 75 70 65 60 55 50 0 50 VIN = 3.3V VNEG = -5V WITH INEG = 10mA VPOS = 15V WITH IPOS = 5mA VMAIN = 10V VMAIN = 8V
-4.60 -4.65 -4.70 -4.75 VNEG (V) -4.80 -4.85 -4.90 -4.95 -5.00 -5.05 0
VNEG = -5V
80
VSUPN = 6V
VSUPN = 10V
VSUPN = 8V VSUPN = 10V
100 150 200 250 300 350 400 IMAIN (mA)
5
10
15
20 INEG (mA)
25
30
35
40
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
Typical Operating Characteristics (continued)
(Circuit of Figure 5, VIN = 3.3V, TA = +25C, unless otherwise noted.)
MAXIMUM NEGATIVE CHARGE-PUMP OUTPUT VOLTAGE vs. SUPPLY VOLTAGE
MAX1748/8726 toc07
POSITIVE CHARGE-PUMP OUTPUT VOLTAGE vs. LOAD CURRENT
15.2 15.1 15.0 VPOS (V) 14.9 14.8 14.7 14.6 50 14.5 VSUPN = 8V VSUPN = 12V VSUPN = 10V
MAX1748/8726 toc08
POSITIVE CHARGE-PUMP EFFICIENCY vs. LOAD CURRENT
VSUPP = 8V
MAX1748/8726 toc09
-3 -4 -5 VNEG (V) -6 -7 -8 -9 -10 -11 5 6 7 8 9 VSUPN (V) VNEG = -10mA 10 11 INEG = 1mA INEG = 10mA INEG = 20mA
15.3
100 90 EFFICIENCY (%) 80 VSUPP = 10V 70 VSUPP = 12V 60
14.4 12 0 2 4 6 8 10 12 14 16 18 20 IPOS (mA)
40 0 2 4 6 8 10 12 14 16 18 20 IPOS (mA)
MAXIMUM POSITIVE CHARGE-PUMP OUTPUT VOLTAGE vs. SUPPLY VOLTAGE
MAX1748/8726 toc10
SWITCHING FREQUENCY vs. INPUT VOLTAGE
MAX1748/8726 toc11
REFERENCE VOLTAGE vs. REFERENCE LOAD CURRENT
VIN = 3.3V
MAX1748/8726 toc12
24 22 20 VPOS (V) 18 16 14 12 10 8 5
VPOS = 22V IPOS = 10mA IPOS = 1mA
1.20 1.15 SWITCHING FREQUENCY (MHz) 1.10 1.05 1.00 0.95 0.90
MEASURED FROM THE FALLING EDGE OF LX VMAIN = 10V IMAIN = 100mA
1.254
1.252
VREF (V) 2.5 3.0 3.5 4.0 4.5 5.0 5.5
1.250
1.248
IPOS = 20mA
1.246 0.85 0.80 1.244 0 5 10 15 20 25 30 35 40 45 50 INPUT VOLTAGE (V) IREF (A)
6
7
8
9
10
11
12
VSUPP (V)
RIPPLE WAVEFORMS
MAX1748/8726 toc13
LOAD-TRANSIENT RESPONSE
MAX1748/8726 toc14
LOAD-TRANSIENT RESPONSE WITHOUT INTEGRATOR
MAX1748/8726 toc15
VMAIN 10mV/div
IMAIN 200mA/div
IMAIN 200mA/div
VNEG 10mV/div VPOS 10mV/div
ILX 500mA/div
ILX 500mA/div
VMAIN 200mV/div
VMAIN 200mV/div
1s/div VMAIN = 10V, IMAIN = 200mA, VNEG = -5V, INEG = 10mA, VPOS = 15V, IPOS = 10mA
100s/div VIN = 3.3V, VMAIN = 10V, RMAIN = 500 TO 50 (20mA TO 200mA)
100s/div VIN = 3.3V, VMAIN = 10V, INTG = REF, RMAIN = 500 TO 50 (20mA TO 200mA)
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Triple-Output TFT-LCD DC-DC Converters
Typical Operating Characteristics (continued)
(Circuit of Figure 5, VIN = 3.3V, TA = +25C, unless otherwise noted.)
MAIN BOOST STARTUP WAVEFORM
MAX1748/8726 toc16
MAX1748/MAX8726
MAIN BOOST STARTUP WAVEFORM WITH LOAD
MAX1748/8726 toc17
2V 0 10V 0
VSHDN 2V/div
2V 0
VSHDN 2V/div
VMAIN 5V/div
10V 0
VMAIN 5V/div
ILX 500mA/div 0 1ms/div RMAIN = 1k, VMAIN = 10V ILX 500mA/div 0
1ms/div VMAIN = 10V, RMAIN = 50 (200mA)
MAX1748 POWER-UP SEQUENCING
MAX1748/8726 toc18
MAX8726 POWER-UP SEQUENCING
MAX1748/8726 toc19
VSHDN 2V/div
VSHDN 5V/div VMAIN 5V/div
VMAIN 5V/div
VNEG 5V/div VPOS 10V/div 2ms/div VMAIN = 10V, VNEG = -5V, VPOS = 15V 4ms/div VMAIN = 10V, VNEG = -5V, VPOS = 15V
VNEG 5V/div VPOS 10V/div
Pin Description
PIN 1 2 3 4 5 6 7 NAME RDY FB INTG IN GND REF FBP FUNCTION Active-Low, Open-Drain Output. Indicates all outputs are ready. The on-resistance is 125 (typ). Main Boost Regulator Feedback Input. Regulates to 1.248V nominal. Connect feedback resistive divider to analog ground (GND). Main Boost Integrator Output. If used, connect 470pF to analog ground (GND). To disable integrator, connect to REF. Supply Input. +2.7V to +5.5V input range. Bypass with a 0.1F capacitor between IN and GND, as close to the pins as possible. Analog Ground. Connect to power ground (PGND) underneath the IC. Internal Reference Bypass Terminal. Connect a 0.22F capacitor from this terminal to analog ground (GND). External load capability to 50A. Positive Charge-Pump Regulator Feedback Input. Regulates to 1.25V nominal. Connect feedback resistive divider to analog ground (GND).
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
Pin Description (continued)
PIN 8 9 10 11 12 13 14 15 16 NAME FBN SHDN DRVN SUPN DRVP SUPP PGND LX TGND FUNCTION Negative Charge-Pump Regulator Feedback Input. Regulates to 0V nominal. Active-Low Logic-Level Shutdown Input. Connect SHDN to IN for normal operation. Negative Charge-Pump Driver Output. Output high level is VSUPN, and low level is PGND. Negative Charge-Pump Driver Supply Voltage. Bypass to PGND with a 0.1F capacitor. Positive Charge-Pump Driver Output. Output high level is VSUPP, and low level is PGND. Positive Charge-Pump Driver Supply Voltage. Bypass to PGND with a 0.1F capacitor. Power Ground. Connect to GND underneath the IC. Main Boost Regulator Power MOSFET n-Channel Drain. Connect output diode and output capacitor as close to PGND as possible. Must be connected to ground.
Detailed Description
The MAX1748/MAX8726 are highly efficient triple-output power supplies for TFT-LCD applications. These devices contain one high-power step-up converter and two lowpower charge pumps. The primary boost converter uses an internal n-channel MOSFET to provide maximum efficiency and to minimize the number of external components. The output voltage of the main boost converter (VMAIN) can be set from VIN to 13V with external resistors. The dual charge pumps independently regulate a positive output (VPOS) and a negative output (VNEG). These low-power outputs use external diode and capacitor stages (as many stages as required) to regulate output voltages up to +40V and down to -40V. A proprietary regulation algorithm minimizes output ripple as well as capacitor sizes for both charge pumps. Also included in the MAX1748/MAX8726 is a precision 1.25V reference that sources up to 50A, logic shutdown, soft-start, power-up sequencing, fault detection, and an active-low open-drain ready output.
signal shift the switch current trip level, consequently modulating the MOSFET duty cycle.
Dual Charge-Pump Regulator
The MAX1748/MAX8726 contain two individual lowpower charge pumps. One charge pump inverts the supply voltage (SUPN) and provides a regulated negative output voltage. The second charge pump doubles the supply voltage (SUPP) and provides a regulated positive output voltage. The MAX1748/MAX8726 contain internal p-channel and n-channel MOSFETs to control the power transfer. The internal MOSFETs switch at a constant 500kHz (0.5 x fOSC). Negative Charge Pump During the first half-cycle, the p-channel MOSFET turns on and the flying capacitor C5 charges to VSUPN minus a diode drop (Figure 2). During the second half-cycle, the p-channel MOSFET turns off, and the n-channel MOSFET turns on, level shifting C5. This connects C5 in parallel with the reservoir capacitor C6. If the voltage across C6 minus a diode drop is lower than the voltage across C5, charge flows from C5 to C6 until the diode (D5) turns off. The amount of charge transferred to the output is controlled by the variable n-channel on-resistance. Positive Charge Pump During the first half-cycle, the n-channel MOSFET turns on and charges the flying capacitor C3 (Figure 3). This initial charge is controlled by the variable n-channel onresistance. During the second half-cycle, the n-channel MOSFET turns off and the p-channel MOSFET turns on, level shifting C3 by VSUPP volts. This connects C3 in parallel with the reservoir capacitor C4. If the voltage across C4 plus a diode drop (VPOS + VDIODE) is smaller than the level-shifted flying capacitor voltage (VC3 + VSUPP), charge flows from C3 to C4 until the diode (D3) turns off.
Main Boost Converter
The MAX1748/MAX8726 main step-up converter switches at a constant 1MHz internal oscillator frequency to allow the use of small inductors and output capacitors. The MOSFET switch pulse width is modulated to control the power transferred on each switching cycle and to regulate the output voltage. During PWM operation, the internal clock's rising edge sets a flip-flop, which turns on the n-channel MOSFET (Figure 1). The switch turns off when the sum of the voltage-error, slope-compensation, and current-feedback signals trips the multi-input comparator and resets the flip-flop. The switch remains off for the rest of the clock cycle. Changes in the output-voltage error
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
L1 VIN = 2.7V TO 5.5V VOUT = [1 + (R1 / R2)] x VREF VREF = 1.25V
IN OSC S D1 VMAIN (UP TO 13V)
LX
R
Q R1
+
PGND ILIM
C1
INTG CINTG
Figure 1. PWM Boost Converter Block Diagram
For the main boost regulator, soft-start allows a gradual increase of the internal current-limit level during startup to reduce input surge currents. The MAX1748/MAX8726 divide the soft-start period into four phases. During phase 1, the MAX1748/MAX8726 limit the current limit to only 0.38A (see the Electrical Characteristics tables), approximately a quarter of the maximum current limit (ILX(MAX)). If the output does not reach regulation within 1ms, soft-start enters phase II and the current limit is increased by another 25%. This process is repeated for phase III. The maximum 1.5A (typ) current limit is reached within 3.0ms or when the output reaches regulation, whichever occurs first (see the startup waveforms in the Typical Operating Characteristics). For the charge pumps, soft-start is achieved by controlling the rise rate of the output voltage. The output voltage regulates within 4ms, regardless of output capacitance and load, limited only by the regulator's output impedance.
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+ + MAX1748 MAX8726
Gm FB
RCOMP
+ +1.25V
REF GND C2
R2 CCOMP
Soft-Start
Shutdown
A logic-low level on SHDN disables all three MAX1748/MAX8726 converters and the reference. When shut down, supply current drops to 0.1A to maximize battery life and the reference is pulled to ground. The output capacitance and load current determine the rate at which each output voltage will decay. A logic-level high on SHDN power activates the MAX1748/MAX8726 (see the Power-Up Sequencing section). Do not leave SHDN floating. If unused, connect SHDN to IN.
Power-Up Sequencing
Upon power-up or exiting shutdown, the MAX1748 and MAX8726 start their respective power-up sequences.
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Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
SUPN OSC D4 DRVN C5 D5 VSUPN = 2.7V TO 13V
+ +
MAX1748 MAX8726 GND
VREF 1.25V
FBN
R5 C6 R6
VNEG
REF PGND CREF 0.22F VPOS = (R5 / R6) x VREF VREF = 1.25V
Figure 2. Negative Charge-Pump Block Diagram
SUPP OSC D2 C3 DRVP D3
VSUPP = 2.7V TO 13V
+ + MAX1748 MAX8726
GND VREF 1.25V PGND
FBP
R3 C4 R4
VPOS
VPOS = [1 + (R3 / R4)] x VREF VREF = 1.25V
Figure 3. Positive Charge-Pump Block Diagram
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Triple-Output TFT-LCD DC-DC Converters
In the MAX1748, the reference powers up first, then the main DC-DC step-up converter powers up with softstart enabled. Once the main step-up converter reaches regulation, the negative charge pump turns on. When the negative output voltage reaches approximately 88% of its nominal value (VFBN < 110mV), the positive charge pump starts up. Finally, when the positive output voltage reaches 90% of its nominal value (V FBP > 1.125V), the active-low ready signal (RDY) goes low (see the Power Ready section). In the MAX8726, the reference powers up first. After the reference is in regulation, the main DC-DC step-up converter powers up with soft-start enabled. The negative charge pump is enabled when the main step-up converter reaches regulation, and at least 16ms (typ) after the main step-up converter has been enabled. The positive charge pump is enabled when the negative output voltage reaches approximately 88% of its nominal value (VFBN < 110mV), and at least 4ms (typ) after the negative charge pump has been enabled. Finally, when the positive output voltage reaches 90% of its nominal value (VFBP > 1.125V), the active-low ready signal (RDY) goes low (see the Power Ready section). put will not power up until the negative charge-pump output voltage rises above its power-up threshold (see the Power-Up Sequencing section).
MAX1748/MAX8726
Voltage Reference
The voltage at REF is nominally 1.25V. The reference can source up to 50A with good load regulation (see the Typical Operating Characteristics). Connect a 0.22F bypass capacitor between REF and GND.
Design Procedure
Main Boost Converter
Output Voltage Selection Adjust the output voltage by connecting a voltagedivider from the output (VMAIN) to FB to GND (see the Typical Operating Circuit). Select R2 in the 10k to 20k range. Higher resistor values improve efficiency at low output current but increase output voltage error due to the feedback input bias current. Calculate R1 with the following equations: R1 = R2 [(VMAIN / VREF) - 1] where VREF = 1.25V. VMAIN can range from VIN to 13V. Feedback Compensation For stability, add a pole-zero pair from FB to GND in the form of a series resistor (R COMP ) and capacitor (CCOMP). The resistor should be half the value of the R2 feedback resistor. Inductor Selection Inductor selection depends on input voltage, output voltage, maximum current, switching frequency, size, and availability of inductor values. Other factors can include efficiency and ripple voltage. Inductors are specified by their inductance (L), peak current (IPEAK), and resistance (RL). The following boost-circuit equations are useful in choosing inductor values based on the application. They allow the trading of peak current and inductor value while allowing for consideration of component availability and cost. The following equation includes a constant LIR, which is the ratio of the inductor peak-to-peak AC current to maximum average DC inductor current. A good compromise between the size of the inductor, loss, and output ripple is to choose an LIR of 0.3 to 0.5. The peak inductor current is then given by:
IPEAK = IMAIN(MAX) x VMAIN Efficiency x VIN(MIN) x 1 + (LIR/2)
Power Ready
Power ready is an open-drain output. When the powerup sequence is properly completed, the MOSFET turns on and pulls RDY low with a typical 125 on-resistance. If a fault is detected, the internal open-drain MOSFET appears as a high impedance. Connect a 100k pullup resistor between RDY and IN for a logiclevel output.
Fault Detection
Once RDY is low and if any output falls below its faultdetection threshold, RDY goes high impedance. For the reference, the fault threshold is 1.05V. For the main boost converter, the fault threshold is 88% of its nominal value (VFB < 1.1V). For the negative charge pump, the fault threshold is approximately 90% of its nominal value (VFBN < 130mV). For the positive charge pump, the fault threshold is 88% of its nominal value (VFBP < 1.11V). Once an output faults, all outputs later in the power sequence shut down until the faulted output rises above its power-up threshold. For example, if the negative charge-pump output voltage falls below the faultdetection threshold, the main boost converter remains active while the positive charge pump stops switching and its output voltage decays, depending on output capacitance and load. The positive charge-pump out-
[
]
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11
Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
The inductance value is then given by:
L=
2 VIN(MIN) x Efficiency x (VMAIN - VIN(MIN) )
V(MAIN)
2
x LIR x IMAIN(MAX) x fOSC
Considering the typical application circuit, the maximum DC load current (IMAIN(MAX)) is 200mA with a 10V output. A 6.8H inductance value is then chosen, based on the above equations and using 85% efficiency and a 1MHz operating frequency. Smaller inductance values typically offer a smaller physical size for a given series resistance and current rating, allowing the smallest overall circuit dimensions. However, due to higher peak inductor currents, the output voltage ripple (IPEAK x output filter capacitor ESR) will be higher. Use inductors with a ferrite core or equivalent; powder iron cores are not recommended for use with the MAX1748/MAX8726s' high switching frequencies. The inductor's maximum current rating should exceed I PEAK. Under fault conditions, inductor current may reach up to 2.0A. The MAX1748/MAX8726s' fast current-limit circuitry allows the use of soft-saturation inductors while still protecting the IC. The inductor's DC resistance significantly affects efficiency. For best performance, select inductors with resistance less than the internal n-channel FET resistance. To minimize radiated noise in sensitive applications, use a shielded inductor. The inductor should have as low a series resistance as possible. For continuous inductor current, the power loss in the inductor resistance, PLR, is approximated by: PLR (IMAIN x VMAIN / VIN)2 x RL where RL is the inductor series resistance. Output Capacitor A 10F capacitor works well in most applications. The equivalent series resistance (ESR) of the output-filter capacitor affects efficiency and output ripple. Output voltage ripple is largely the product of the peak inductor current and the output capacitor ESR. Use low-ESR ceramic capacitors for best performance. Low-ESR, surface-mount tantalum capacitors with higher capacity may be used for load transients with high peak currents. Voltage ratings and temperature characteristics should be considered. Input Capacitor The input capacitor (CIN) in boost designs reduces the current peaks drawn from the input supply and reduces noise injection. The value of CIN is largely determined by the source impedance of the input supply. High source
12
impedance requires high input capacitance, particularly as the input voltage falls. Since step-up DC-DC converters act as "constant-power" loads to their input supply, input current rises as input voltage falls. A good starting point is to use the same capacitance value for CIN as for COUT. Table 1 lists suggested component suppliers. Integrator Capacitor The MAX1748/MAX8726 contain an internal current integrator that improves the DC load regulation but increases the peak-to-peak transient voltage (see the load-transient waveforms in the Typical Operating Characteristics). For highly accurate DC load regulation, enable the current integrator by connecting a 470pF capacitor to INTG. To minimize the peak-to-peak transient voltage at the expense of DC regulation, disable the integrator by connecting INTG to REF and adding a 100k resistor to GND. Rectifier Diode Use a Schottky diode with an average current rating equal to or greater than the peak inductor current, and a voltage rating at least 1.5 times the main output voltage (VMAIN).
Table 1. Component Suppliers
SUPPLIER INDUCTORS Coilcraft Coiltronics Sumida USA Toko CAPACITORS AVX Kemet Sanyo Taiyo Yuden DIODES Central Semiconductor International Rectifier Motorola Nihon Zetex 516-435-1110 310-322-3331 602-303-5454 847-843-7500 516-543-7100 516-435-1824 310-322-3332 602-994-6430 847-843-2798 516-864-7630 803-946-0690 408-986-0424 619-661-6835 408-573-4150 803-626-3123 408-986-1442 619-661-1055 408-573-4159 PHONE 847-639-6400 561-241-7876 847-956-0666 847-297-0070 FAX 847-639-1469 561-241-9339 847-956-0702 847-699-1194
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Triple-Output TFT-LCD DC-DC Converters
Charge Pump
Efficiency Considerations The efficiency characteristics of the MAX1748/MAX8726 regulated charge pumps are similar to a linear regulator. They are dominated by quiescent current at low output currents and by the input voltage at higher output currents (see the Typical Operating Characteristics). So the maximum efficiency can be approximated by: Efficiency VNEG / [VIN N]; for the negative charge pump Efficiency VPOS / [VIN (N + 1)]; for the positive charge pump where N is the number of charge-pump stages. Output Voltage Selection Adjust the positive output voltage by connecting a voltage-divider from the output (VPOS) to FBP to GND (see the Typical Operating Circuit). Adjust the negative output voltage by connecting a voltage-divider from the output (VNEG) to FBN to REF. Select R4 and R6 in the 50k to 100k range. Higher resistor values improve efficiency at low output current but increase output-voltage error due to the feedback input bias current. Calculate the remaining resistors with the following equations: R3 = R4 [(VPOS / VREF) - 1] R5 = R6 (VNEG / VREF) where VREF = 1.25V. VPOS can range from VSUPP to 40V, and VNEG can range from 0 to -40V. Flying Capacitor Increasing the flying capacitor's value reduces the output current capability. Above a certain point, increasing the capacitance has a negligible effect because the output current capability becomes dominated by the internal switch resistance and the diode impedance. Start with 0.1F ceramic capacitors. Smaller values can be used for low-current applications. Charge-Pump Output Capacitor Increasing the output capacitance or decreasing the ESR reduces the output ripple voltage and the peak-topeak transient voltage. Use the following equation to approximate the required capacitor value: COUT [IOUT / (500kHz x VRIPPLE)] TRANSISTOR COUNT: 2846 Charge-Pump Input Capacitor Use a bypass capacitor with a value equal to or greater than the flying capacitor. Place the capacitor as close to the IC as possible. Connect directly to PGND. Rectifier Diode Use Schottky diodes with a current rating equal to or greater than 4 times the average output current, and a voltage rating at least 1.5 times VSUPP for the positive charge pump and VSUPN for the negative charge pump.
MAX1748/MAX8726
PC Board Layout and Grounding
Careful printed circuit layout is extremely important to minimize ground bounce and noise. First, place the main boost-converter output diode and output capacitor less than 0.2in (5mm) from the LX and PGND pins with wide traces and no vias. Then place 0.1F ceramic bypass capacitors near the charge-pump input pins (SUPP and SUPN) to the PGND pin. Keep the chargepump circuitry as close to the IC as possible, using wide traces and avoiding vias when possible. Locate all feedback resistive dividers as close to their respective feedback pins as possible. The PC board should feature separate GND and PGND areas connected at only one point under the IC. To maximize output power and efficiency and to minimize output-power ripple voltage, use extra wide power ground traces and solder the IC's power ground pin directly to it. Avoid having sensitive traces near the switching nodes and high-current lines. Refer to the MAX1748/MAX8726 evaluation kit for an example of proper board layout.
Applications Information
Boost Converter Using a Cascoded MOSFET
For applications that require output voltages greater than 13V, cascode an external n-channel MOSFET (Figure 4). Place the MOSFET as close to the LX pin as possible. Connect the gate to the input voltage (VIN) and the source to LX. MOSFET Selection Choose a MOSFET with an on-resistance (R DS(ON)) lower than the internal n-channel MOSFET. Lower RDS(ON) will improve efficiency. The external n-channel MOSFET must have a drain-voltage rating higher than the main output voltage (VMAIN).
Chip Information
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13
MAX1748/MAX8726
Triple-Output TFT-LCD DC-DC Converters
Figure 4. Power Supply Using Cascoded MOSFET
14
6.8H VMAIN = +18V, 140mA 3.3F 100k R1 130k COUT 10F IN SUPN LX SHDN FB RDY 0.22F DRVP SUPP R2 10k RCOMP 5k CCOMP 68nF DRVN 0.22F 0.1F 0.1F 0.47F
VIN = 5.0V
MAX1748 MAX8726
0.47F
VNEG = -8V, 20mA FBP FBN 1.0F R6 49.9k REF CREF 0.22F PGND R5 319k
VPOS = +25V, 5mA R3 1M R4 49.9k INTG TGND GND CINTG 470pF
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1.0F
VIN = 3.0V VMAIN = +10V, 200mA 3.3F IN 100k SHDN FB RDY R2 10k CCOMP 6.8nF DRVN 0.1F SUPN SUPP FBN 1.0F R6 49.9k REF CREF 0.22F DRVP 0.1F R5 200k 0.1F 0.1F RCOMP 5k 0.1F R1 70k COUT 10F LX
6.8H
MAX1748 MAX8726
VNEG = -5V, 20mA
VPOS = +15V, 10mA INTG CINTG 470pF GND TGND FBP PGND R3 670k R4 49.9k 1.0F
MAX1748/MAX8726
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Triple-Output TFT-LCD DC-DC Converters
Typical Operating Circuit
15
Triple-Output TFT-LCD DC-DC Converters MAX1748/MAX8726
Package Information
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.)
TSSOP4.40mm.EPS
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 (c) 2004 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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